Noah Beck

Home: Princeton, MA 01851
      (978) 464-5174       
      noah.b.beck@gmail.com
      Preferred locations: greater Boston (west and north),
                           greater Worcester,
                           southwest Ohio

Summary: Multiprocessor SOC architecture, design, and verification.
Experienced as a technical lead working with teams in multiple 
geographies and multiple disciplines.

Experience:
  AMD64 Design Engineer, 2004 - Present
  Advanced Micro Devices (AMD), Boxboro, MA
  - Current role: SOC Architect for AMD's next generation server processor,
    including writing microarchitectural specifications, identifying die
    requirements for support of multiple packages and platforms, and making
    chip-level power and frequency estimates
  - Previous roles:
    - SOC Co-Architect for AMD's first ARM-based server product, including
      detailed AMBA interconnect specification for integrated IPs
    - SOC Architect for the 2nd generation Bulldozer-based server processor
    - RTL lead for the first Bulldozer-based server processor, including
      writing new infrastructure to support the hardware emulation team,
      coordinating feature enablement across sub-IPs, and owning the toplevel
      RTL
    - RTL lead for 45nm dual- and quad-core derivative products, including
      running the feature approval process
    - Design verification lead for optimization of AMD64 dual- and quad-core
      silicon including scan dump analysis, functional issue debug, and speed
      path isolation
    - Full chip verification debug lead for multiple AMD64 designs (K8F, K8G),
      including supporting the bring-up process on ATE for 65nm processor
      first silicon

  UltraSPARC V Verification Engineer, 1999 - 2004
  Sun Microsystems, Burlington, MA
  - Full chip verification of RTL and gate level models of the UltraSPARC V
    microprocessor.
  - Unit-level functional and performance verification of the instruction
    fetch block.
  - Development and support of verification infrastructure, test benches, and
    random stimulus using verilog, C, perl, and shell scripts.

Skills:
  Microprocessor microarchitecture: RTL design, Hardware Verification
  Programming Languages: Perl, C, C++, Verilog, MySQL
  Assembly Language: X86, SPARC
  Operating Systems: Linux, Solaris
  Shell Scripting: bash, ksh

Education:
  Purdue University, West Lafayette, IN
  Master of Science in Electrical Engineering (thesis, computer area), 1999
  Bachelor of Science in Computer Engineering, 1997

Interests: In my free time, I enjoy gardening and photography.